ECE DISTINGUISHED SPEAKER SERIES: Adjoint Sensitivity for the Analysis, Design and Test of Integrated Circuits

Abstract: With an overhead of less than a single simulation, adjoint sensitivity provides the gradient of any circuit voltage or current or (error) function thereof with respect to every circuit parameter. In the time domain it does so by running both time and space backwards then convolving those results with the original to obtain the variations. In that sense it resembles a "transparent AI." The gradient elements, which can be existing or even nonexistent parameters, can be adjusted efficiently to approximate the statistical behavior of a circuit to provide yield analysis or fault insertion. The inter-reciprocity of the adjoint circuit with the original can be exploited to determine specification planes for design centering, robustness and yield enhancement.
Bio: Ron Rohrer is Cecil & Ida Green Professor of ECE at Southern Methodist University and Emeritus Professor of ECE at Carnegie Mellon University.
A noted innovator, entrepreneur and professor, Ron is recognized as an early developer of circuit simulation, Integrated Circuit (IC) interconnect reduction and delay calculation. He is credited with driving Electronic Design Automation (EDA) tools into broad industry use. In 1968, in a graduate course he taught at UC, Berkeley, he oversaw the production of an IC simulation program similar to the FairCirc program he had developed earlier at Fairchild Semiconductor, a forerunner to SPICE. Based on earlier adjoint circuit simulation work, in 1971, Ron developed the foundation of what became the industry standard technique for simulation of analog and Radio Frequency (RF) IC noise. In 1982, while at General Electric (GE), he launched the logic synthesis work that led to the Socrates logic synthesis tool, and later to the formulation of Synopsys, Inc. As a professor at Carnegie Mellon, in 1988 he introduced Asymptotic Waveform Evaluation (AWE), which formed the basis for industry-wide interconnection reduction techniques for efficient IC delay calculation.
Ron also held executive management positions in EDA at companies including Cadence, Magma, Scientific Calculations, Calma, and the GE Technical Systems Sector, was a Venture Partner with Intersouth Partners, and has served on boards and as technical advisor to twenty early-stage companies.
The founding editor of the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Ron also served as president of the Circuits and Systems Society.